The present application relates generally to an improved data processing apparatus and method and more specifically to mechanisms for enhanced power savings in memory arrays.
Static random access memory (SRAM) is a type of volatile digital memory that retains data written to it so long as power is applied to the SRAM. One type of SRAM commonly used in high performance computational circuits is referred to as a “domino” SRAM.
As will be appreciated by those skilled in the art, in prior art domino SRAM designs, the cells are arranged into groups of cells, typically on the order of eight to sixteen cells per group. Each cell in a group is connected to a local bit line pair and the local bit line pair for each group of cells is coupled to a global bit line pair. Rather than use a sense amplifier to detect a differential voltage when reading a cell, in a ripple domino read SRAM scheme the local bit lines are discharged by the cell in a read operation. When a discharge is detected, a state of the cell may then be determined.